ASADULLAH, FAISAL ISMAIL (2025) DESAIN ARSITEKTUR AI ACCELERATOR BERBASIS SYSTOLIC ARRAY UNTUK ARTIFICIAL NEURAL NETWORK (ANN). Undergraduate thesis, UNIVERSITAS DIPONEGORO; FAKULTAS TEKNIK.
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Abstract
Perkembangan kecerdasan buatan (Artificial Intelligence/AI) menuntut solusi
komputasi yang cepat, efisien, dan hemat daya, khususnya dalam pengolahan
Artificial Neural Network (ANN). Penelitian ini merancang dan
mengimplementasikan arsitektur AI Accelerator berbasis systolic array yang
dioptimalkan untuk tahap forward propagation pada ANN.
| Item Type: | Thesis (Undergraduate) |
|---|---|
| Subjects: | Engineering > Electrical Engineering |
| Divisions: | Faculty of Engineering > Department of Electrical Engineering |
| Depositing User: | nurohmi pwk |
| Date Deposited: | 04 Feb 2026 02:19 |
| Last Modified: | 04 Feb 2026 02:19 |
| URI: | https://eprints2.undip.ac.id/id/eprint/44525 |
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